CERN is seeking an FPGA Developer in the Accelerators Systems Department RF Group to help replace vacuum tube based driver amplifiers with solid state RF amplifiers, developing FPGA firmware for interlock and protection systems and creating Python tools for automated measurements and validation across the PS Complex, with hands on lab testing and commissioning in Geneva. What matters most is demonstrable FPGA design experience, preferably in VHDL, familiarity with development environments and debugging tools, and solid Python for test automation; PCB design is a plus. English is required and a willingness to learn French. Eligibility requires CERN Member or Associate Member State status, a maximum of two years post graduation, and a bachelor or master degree; PhDs and prior CERN fellowships are not eligible. To apply, tailor your CV to relevant FPGA projects and RF lab work, quantify interlock or protection experience, show readiness for onsite work in radiation areas, and include a plan for learning French before the 01 July 2026 deadline.
In this role, you will join the Accelerators Systems Department (SY) and work within the Radio Frequency (RF) Group, which is responsible for the operation, maintenance, and development of RF power amplifiers and accelerating cavities. As part of an ongoing consolidation of the RF systems of the CERN Proton Synchrotron (PS), the existing vacuum tube-based driver amplifiers are planned to be replaced by new solid-state RF amplifiers. You will contribute to the development of FPGA firmware for amplifier interlock systems and for rapid fault-detection and protection systems used across the RF systems of the PS Complex. The role also includes supporting the integration and testing of new systems and developing Python tools for automated measurements and hardware validation. The work will involve both laboratory testing and commissioning activities on RF equipment.
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Job closing date: 01.07.2026 at 23:59 CEST.
Contract duration: 24 months, with a possible extension up to 36 months maximum.
Working hours: 40 hours per week
Job flexibility: Fully Onsite
Target start date: 01-August-2026
This position involves:
Job reference: SY-RF-LIS-2026-164-GRAE
Field of work: Electrical or Electronics Engineering
Benchmark job: 200050 - Electronics Engineer
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