Mixed-Signal IC Design Engineer (EP-ESE-ME-2026-107-GRAP)

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CERN seeks an Analogue/Custom IC Design Engineer to advance radiation-tolerant optical links for future High Energy Physics experiments. You will design and verify CMOS blocks including clock and data recovery, clock distribution, and high-speed ADCs, contribute to silicon photonics, and push prototypes toward demonstrators with testing. Ideal candidates bring strong analogue and digital electronics, hands-on IC design, Cadence Virtuoso, and knowledge of DRC/LVS/PEX and PLL/CDR, plus scripting in Python or MATLAB. Eligibility requires CERN Member or Associate Member State status and a Master 2-6 years or PhD with up to 3 years postgrad, no prior CERN fellowship. Onsite in Geneva, 40 hours/week, 24 months with potential extension. Submit a targeted CV and cover letter linking your work to High Speed Links by 01.07.2026.

Job Description

Join the CERN Experimental Physics Department and help develop next-generation detector technologies for future High Energy Physics experiments. As part of the High Speed Links programme, you will contribute to radiation-tolerant optical communication systems that combine custom ASICs, silicon photonics, optical modules, and FPGA platforms to enable reliable high-speed data transmission in extreme environments. We are seeking an Analogue/Custom IC Design Engineer to design and validate advanced communication ASICs and high-speed CMOS circuits for particle physics detectors. The role involves taking cutting-edge technologies from prototype development through to full system demonstrators.

Your responsibilities

• Study and define architectures for analogue and mixed-signal circuits that enable high-speed communication systems using silicon photonics.
• Design and verify CMOS circuit blocks such as clock and data recovery (CDR) circuits, high speed clock distribution networks and high-speed analogue-to-digital converters (ADCs).
• Perform laboratory testing, characterisation, and validation of circuits.
• Carry out radiation qualification (single-event effects and total ionising dose) of manufactured devices.

Your profile

• A strong background in digital and analogue electronics, ideally in an IC design environment.
• Familiarity with clock generation and distribution, including fundamentals of DLL, PLL, and CDR circuits.
• The ability to solve engineering problems using a variety of analysis and simulation methods.
• Hands-on experience in the design, testing and debugging of electronic circuits.
• A strong team player who can also work independently.

Skills

• Design, simulation and layout of CMOS integrated circuits using Cadence Virtuoso.
• Working knowledge of physical verification flows (DRC, LVS, PEX) using Siemens Calibre or Cadence PVS.
• Knowledge of at least one of the following: optical receiver circuits, high data rate drivers (wireline, laser and/or external modulators), PLL and CDR design, TIA, ADC and DAC design, control systems.
• Working knowledge of at least one programming, scripting, or data analysis language (e.g., Python, Bash, MATLAB).
• Experience with electromagnetics (EM) simulation tools (e.g., Ansys HFSS, Simulia CST) is considered a plus.
• Spoken and written English, with a commitment to learn French.

Eligibility criteria:

• You are a national of a CERN Member or Associate Member State.
• You have a professional background in Electronics Engineering (or a related field) and have either:
  • a Master's degree with 2 to 6 years of post-graduation professional experience;
  • or a PhD with no more than 3 years of post-graduation professional experience.
• You have never had a CERN fellow or graduate contract before.

Additional Information

Job closing date: 01.07.2026 at 23:59 CEST.

Contract duration: 24 months, with a possible extension up to 36 months maximum.

Working hours: 40 hours per week

Job flexibility: Hybrid

Target start date: 01-August-2026

This position involves:

• Work during nights, Sundays and official holidays.
• Work in Radiation Areas.
• Work during nights, Sundays and official holidays, when required by the needs of the Organization.

Job reference: EP-ESE-ME-2026-107-GRAP

Field of work: Electrical or Electronics Engineering

Benchmark job: 200050 - Electronics Engineer

Global Benefits

• A monthly stipend between 6372-7004 Swiss Francs per month (tax free) depending on your degree.
• 30 days of paid leave per year plus 2 weeks annual closure.
• Coverage by CERN’s comprehensive health insurance scheme (for yourself, your spouse and children), and membership of the CERN Pension Fund.
• Family, child and infant monthly allowances depending on your individual circumstances.
• A relocation package (installation grant and travel expenses) depending on your individual circumstances.
• Possibility to extend your contract up to 36 months.
• On-the-job and formal training including language classes.

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