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Firmware & FPGA Development Engineer (SY-BI-BP-2026-154-GRAP)

CERN
9 hours ago
Full-time
On-site
Geneva, GENEVA, Switzerland
CHF 84,048 CHF yearly

CERN is seeking a Firmware & FPGA Development Engineer to join the SY-BI group within the Accelerator Systems Department. The team designs and operates instruments that observe beam properties, essential for the reliable operation and ongoing development of CERN’s accelerator complex. In this role you’ll help build next‑generation beam‑position monitoring systems for CERN’s injector complex, including the pre‑accelerators and the Antimatter Decelerator. It’s a full‑time, onsite position based in Geneva, aimed at people who want to work at the intersection of digital electronics, embedded systems, real‑time signal processing, and accelerator physics.

This is a hands‑on opportunity to contribute across hardware and software, from FPGA gateware and embedded SoC firmware to real‑time DSP algorithms and data‑driven validation in lab and accelerator environments. You’ll collaborate with engineers, physicists, and technicians from different teams across CERN, applying your practical know‑how to solve complex measurement challenges and help push the performance of beam‑monitoring systems forward.

If you’re excited by high‑speed electronics, HDL development, and the chance to see your work operate inside a major research facility, this role could be a strong fit. The position is fully onsite in Geneva and centers on delivering robust measurement capabilities for CERN’s accelerator complex.

Shaping the fast lanes of beam sensing

As part of your day‑to‑day, you’ll develop, integrate, and test FPGA gateware and embedded firmware for an SoC device, translating system requirements into reliable hardware and software that can acquire and process data at high speeds. You’ll implement data acquisition and processing logic, including real‑time digital signal processing, and you’ll validate performance both in the laboratory and in real accelerator settings. You’ll also perform data analysis in Python and assist with measurement campaigns across the accelerator complex, working closely with a team of seasoned engineers, physicists, and technicians from multiple groups at CERN.

What you’ll need to qualify

  • You’re a national of a CERN Member or Associate Member State
  • You have a background in Electronic Engineering (or a related field) and meet one of these paths: a Master’s degree with 2 to 6 years of post‑graduate professional experience, or a PhD with up to 3 years of post‑graduate experience
  • You have never held a CERN fellow or graduate contract before
  • You are fluent in spoken and written English and are committed to learning French

Nice‑to‑have experience that helps you stand out

  • You have hands‑on experience with Verilog or SystemVerilog
  • You know digital electronics beyond the basics
  • You have practical Python programming experience

Pay, benefits and practical details

The role carries a minimum annual salary of 84,048.00 CHF. Working hours are 40 hours per week and the position is fully onsite in Geneva. The contract runs for 24 months with the possibility of an extension up to 36 months, and the target start date is 01‑March‑2027. The job closing date is 24.11.2026 at 23:59 CEST, and the job reference is SY-BI-BP-2026-154-GRAP.

Global benefits include a monthly net stipend of 6,372 or 7,004 Swiss Francs per month depending on your degree, 30 days of paid leave per year plus 2 weeks of annual closure, coverage by CERN’s health insurance for you and your family, membership of the CERN Pension Fund, and family allowances that vary with circumstances. There is a relocation package (installation grant and travel expenses) depending on individual circumstances, with the possibility to extend the contract to 36 months. CERN also offers on‑the‑job and formal training, including language classes.

A few practical pointers for applicants

Lead your resume with your hands‑on DSP and FPGA/SoC work, especially any projects that involved real‑time data processing and validation in a lab or accelerator setting.

If you have concrete examples of FPGA/SoC work and DSP pipelines, describe them briefly and quantify outcomes where possible to prove you can ship results that meet performance targets.

Be ready to discuss measurement campaigns you’ve supported or led, the kinds of data you analyzed in Python, and how you validated system performance in both lab and accelerator environments.

Ask a targeted question about how beam‑position monitor designs integrate with existing measurement campaigns across the injector complex and what opportunities there are to contribute to upcoming upgrades or tests.

How to apply

Applications should be submitted by 24.11.2026 at 23:59 CEST, using the job reference SY-BI-BP-2026-154-GRAP.