Stage ingénieur: Amélioration de la vérification d’un contrôleur I2C avec UVM, preuve formelle et IA (H/F)

NXP Semiconductors is looking for a final-year engineering student to join its Caen team for a six-month internship in the Verification group within the Secure Transactions and Identification unit. The project focuses on improving the verification of the I2C module that sits inside NFC components, a core area for mobile payments and contactless technology. The work is onsite in Caen, France, and suits someone who wants hands-on experience in digital verification and wants to bridge theory with hardware challenges.

The bi-lingual program reflects NXP’s drive to deliver high-quality solutions for secure mobility, secure payments and identity, and NFC infrastructure. The Verification Team handles activities from early specifications through to tape-out, ramp to production and customer support, so you’ll see how verification drives product quality across the lifecycle. If you’re curious about how robust verification supports real-world NFC use cases, this could be a fit.

As a six-month internship starting in the first quarter of 2027, you’ll work on improving the coverage of the I2C IP verification, with a setup that blends formal methods, assertion development, and exploration of AI-assisted testbench enhancements. It’s a hands-on role that can lead to future opportunities in SoC or IP verification after the internship, depending on interests and results.

Making your daily work count in the I2C verification lab

Your main mission centers on boosting the verification coverage of the MI2C_CTRL IP. You’ll take ownership of the existing verification environment, build and refine assertions, and apply formal verification to support waivers currently used by the team. When some waivers don’t hold under scrutiny, you’ll craft new test scenarios and extend the existing tests to maintain strong coverage of the I2C interface. You’ll also look for ways to strengthen the functional coverage of the I2C control block and examine how AI could make the testbench more efficient by generating challenging negative scenarios, proposing or automatically producing assertions, and verifying protocol conformance in a range of I2C sequences.

The role invites you to connect theory with practice, so you’ll see how verification decisions influence product readiness and reliability. The work will sit alongside broader efforts within the STI verification team, offering a clear view of how IP verification feeds into broader SoC verification strategies.

The must-haves and the nice-to-haves

• A master’s-level degree in engineering, with the last year of study focused on Integrated Circuits, Integrated Electronics Systems, Electronics, or Micro-Electronics.
• A curious mindset, eager to tackle tough technical topics and test new approaches.
• Open-mindedness to learn new methodologies and to connect digital design concepts with analog ones.
• Autonomy to work independently, investigate problems and propose practical solutions.
• Solid technical grounding in digital design, SystemVerilog, and verification concepts.
• Motivation to grow in IP or SoC verification by contributing innovative ideas.
• A good command of English is required.

Pay, benefits and practical details you should know

The position is a six-month internship with onsite work in Caen, France. It is described as a full-time internship, aligned with the needs of a hands-on verification project within the STI unit. Specific salary, benefits, or schedule details aren’t disclosed in the posting, but the arrangement is clearly onsite in Caen for the duration of the internship.

Advice for applicants you can put into practice

Lead with your strongest, most relevant background. If you’re in the final year of your engineering studies, open your resume with your master’s program and the exact fields that map to the role, integrated circuits, embedded systems, or electronics, and mention any project work tied to digital design, SystemVerilog, or verification concepts.

Showcase tangible evidence for the must-haves. Highlight projects or internships where you built or extended a verification environment, wrote assertions, or used formal methods to justify design decisions. If you’ve touched UVM or similar verification frameworks, call that out with concrete outcomes, even in a course project.

Get ready to discuss verification strategy in interviews. Be prepared to describe your approach to improving IP verification coverage, including how you would assess waivers and determine when a test scenario is justified or not, and how you would use AI to generate negative test cases or practical assertions.

Ask a focused question that demonstrates you understand the role’s scope. For example, you could inquire about how the team envisions AI aiding the testbench across different I2C sequences, or what success looks like for the six-month project and potential pathways into SoC or IP verification afterward.

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